SPI_FRF=STD, TMOD=TX_AND_RX
Control register 0
| DFS | Data frame size |
| FRF | Frame format |
| SCPH | Serial clock phase |
| SCPOL | Serial clock polarity |
| TMOD | Transfer mode 0 (TX_AND_RX): Both transmit and receive 1 (TX_ONLY): Transmit only (not for FRF == 0, standard SPI mode) 2 (RX_ONLY): Receive only (not for FRF == 0, standard SPI mode) 3 (EEPROM_READ): EEPROM read mode (TX then RX; RX starts after control data TX’d) |
| SLV_OE | Slave output enable |
| SRL | Shift register loop (test mode) |
| CFS | Control frame size Value of n -> n+1 clocks per frame. |
| DFS_32 | Data frame size in 32b transfer mode Value of n -> n+1 clocks per frame. |
| SPI_FRF | SPI frame format 0 (STD): Standard 1-bit SPI frame format; 1 bit per SCK, full-duplex 1 (DUAL): Dual-SPI frame format; two bits per SCK, half-duplex 2 (QUAD): Quad-SPI frame format; four bits per SCK, half-duplex |
| SSTE | Slave select toggle enable |